Course Description

CMOS VLSI Technology has been progressing quickly for decades. As a result, sub-100nm CMOS devices using low supply voltages are unavoidable for implementing VLSI chips. For sub-100nm CMOS technology, 1.5V supply voltage may be required. Using a low supply voltage, the techniques required for designing low-voltage VLSI CMOS circuits are challenging. This course is targeted to analyze the circuit techniques for designing low-voltage CMOS VLSI circuits using deep-submicron CMOS devices with a low supply voltage. Based on 20-year experience in this field, in this course the lecturer approaches this hot topic from processing technology, and devices to circuits and systems. Starting from the CMOS technology, SPICE compact modeling of CMOS VLSI devices is described. Then evolution of CMOS static and dynamic logic circuit families is presented. Various CMOS static and dynamic logic circuits are analyzed in terms of advantages and disadvantages. Low-Voltage bootstrapped techniques for designing low-voltage and low-power CMOS VLSI circuits are presented. Low-voltage CMOS memories such as DRAMs, SRAMs are explained, followed by non-volatile memories and FRAMs. In the final portion of the course, low-voltage CMOS VLSI systems are described. Starting from basic building blocks such as adders, counters, multipliers, and register files, low-voltage control circuits, ALU, CPU, and DSP are described, followed by the embedded systems and future trends. This course is for undergraduate senior students and first-year graduate students interested in compact device modeling and circuit designs. This course is also suitable for engineering professionals to be or being involved in this field.

Course Instructor

James B. Kuo

Textbooks

Low-Voltage CMOS VLSI Circuits by J. B. Kuo, Wiley, New York (ISBN 0471321052)

Reference Books

Related class notes are specified at the beginning the class.

Prerequisites

ENSC 427 or permission of the instructor.