Advanced Digital System Design (FAQ)

 

 

Lab Tutorials and Demonstration

Technical Course Project Discussions

 

 

 

 

 

Lab Tutorials and Demonstration

 

 

File/Folder Location

 

Question 1. How can I develop the environment speed?

 

Answer: If you develop your project off the C: drive (hard drive) of your workstation, it's dramatically faster than off the network drive.

 

 

Question 2. We tried to put the project files on H: drive but it got full. We tried to save on desktop, but the filenames have a space in their path (Documents and Settings) so the tools don't work. For now we are using folders inside C:\temp. Is there a better place to put the files?

 

Answer: You could try an external USB key or you could ask the System Admin to increase the size of your accounts.

 

 

Question 3. I have keep trying to "Build All Application", but it fails to create any elf file, and even the "mbo_default" folder with the following errors: “ERROR:MDT - standalone () - couldn't open "./src/config.make": no such file... “

 

Answer: Make sure there is no “space character” in the folder path.

 

 

Question 4. I am trying to run iMPACT but getting an error like “no write permission”. What can I do now?

 

Answer:

·         Create a shortcut to iMPACT on the desktop (found in C:\Xilinx8_2\bin\nt folder)

·         Right click on the shortcut and select Properties

·         Change the "Start in" properties of the shortcut to a directory like temp that you can write to

·         When it then runs it will ask to change the working directory to the one you specified in the properties

 

 

Software Debugger

 

Question 5. Whenever I try to connect to the GDB software debugger I get the error message "localhost: 1234: Connection refused.”. GDB cannot connect to the target board using localhost: 1234 though the board is securely connected. What should I do now?

 

Answer: You need to have the XMD console running for GDB to connect on that address/port. XMD acts a server and must be running before you  launch the GDB.

 

 

Commands

 

Question 6. When I type con (continue) command in XMD, it says “Processor started”. After that whenever I type 'stop' to stop processor, it says "Unable to stop processor" and just continue to execute the program until I rst (reset) the system. Can I use the ‘con’ syntax for a faster debugging or I have to use stp (step)?

 

Answer: When you push "stop", GDB sends a signal to interrupt processor execution. If GDB can't communicate with XMD to interrupt processor execution, you get this message. You can just continue execution instead of stepping; however, you should insert an extra breakpoint to stop the processor after you type con.

 

 

Question 7. When do we need the ‘dow’ command?

 

Answer: The ‘dow’ command needs to be used if the initialization of BRAM is not selected in the option; you also need to use ‘dow’ command if MicroBlaze is using off-chip memory. Some people have also found that if you want to run your code directly from XMD, you will need to download it (even if the on-chip BRAMs have been initialized) again before the "run" command will work.

 

 

Connections

 

Question 8. I found it messy to look at the ports to see which components are connected together, is there any better method?

 

Answer: You can always open the system.mhs file and look there. It describes the system's top level and illustrates how signals are connected. Additionally, if you go to Project -> Generate and View Block Diagram, it gives you, well, a block diagram of the entire system along with some tabular data.

 

 

Code

 

Question 9. In the lab 3 tutorial the constant in the lab3 the C code given to us has this constant define  #define CLOCK_MHZ 27000000, and the comment above says that the time slice based upon the OPB bus frequency.But when I check the OPB bus clock frequency I saw 25MHz. Am i looking at the wrong place wrong clock frequncy for the OPB bus, or this is not the OPB bus frequency?

 

Answer: The C code is wrong. The multimedia board on which it was intially designed has a 27MHz clock.

 

 

Question 10. What is the an GPIO instance pointer ? Where I can find it ?

 

Answer: There is a line in your .c source code that makes a GPIO instance, xGpio Gpio; so just point to the instance by writing &Gpio.

 

 

Question 11. Where do i find the TIMER INTERRUPT ID?

 

Answer: Check at the header file generated xparameters.h; there is a mask XPAR_OPB_INTC_0_OPB_TIMER_0_INTERRUPT_INTR

 

 

Question 12. In m10 fsl example, what is incorrect in the C code?

 

Answer: The mistake is the id number in nputfsl and ngetfsl. You can find the id number in xparameters.

 

 

EDK tools

 

Question 13. I am trying to use the plb_tft_cntlr_ref core from xilinx to get display on the monitor. So I created a PLB bus and used a OPB2PLB core to connect the OPB bus to the PLB bus. However, when I try to synthsize the system I keep getting error messages. What should I do now?

 

Answer: You need a plb2opb bridge instead of opb2plb bridge to get the synthesis running.

 

 

Question 14. In plb_tft_cntlr_ref, how can we make the rgb test pattern working ? Should we add an DCR bus? How should we modify the address map for the bridge and the plb.tft.cntr.ref ?

 

Answer:  You can use an OPB to DCR bridge to connect a Microblaze to the DCR bus connection to the TFT controller, and the TFT controller is itself connected to DDR memory on the PLB. The DCR connection allow the Microblaze processor to change the starting address that the TFT controller looks for the image data to display

 

 

Question 15. When I press “Build libraries” and BSP I don't see all the driver files such as PLB2OPB driver and tft_ref driver. What can I do now?

 

Answer: Check your mss file. It has a reference for those drivers.

 

 

Question 16. In the example of 256 MB Single Rank DDR Memory with VGA controller, the Mem_VGA code displays color on the monitor by writing to this pDisplay_data pointer and pDisplay_data = (unsigned int *)0x07E00000. Where do they get this adress and how this work?

 

Answer: 0x07E00000 is the default base address for the VGA controller core. This address can be changed by modifying the generic in the configure IP Options for the core. Note that the generic is in binary, it's 11 bits and the bits on the bus are reversed.

 

 

Question 17. Can we map the boot loop/xmdstub to different addresses?

 

Answer: The microblaze boots to 0x0, so it *has* to boot from there.

 

 

Question 18. What happen if I am using two MicroBlaze cores ? How can the two Microblazes point to the same booting address ? Or can I do that ?

 

Answer: You can have two ublaze cores. If they have separate address spaces, then they should be able to both boot from two separate memories with different boot codes.

 

You can have the microblaze from independent memories, if you set it up to run code on the BRAMs- that will be the default.

 

 

Question 19. I've been trying to connect my random generator to the FSL. When I try to add the FSL controller into my project, connect it up properly, then build netlist, generate bitstream, and build all libraries and BSP's, the Slot_ID isn't showing up in the xparameters file. I need this ID in order to use the read and write from FSL commands in my C code. Since Xparameters is generated automatically, and can't be edited, any idea what I need to do for XPS to add this to the xparameters file?

 

Answer: Check the mhs file. Do you have an FSL link connecting your ublaze to your core? Check to see if the FSL core has a driver. You may need to include a library to use the read and write commands.

 

 

Question 20. In lab 2, we found that the external reset could be either active high or low when we looked at mb_opb, but in the data sheet for LMB, there's also a reset called LMB_Rst, which is active high, since the hint told us to look at both LMB and OPB controllers, which one is the one they mean?

 

Answer: One of the configurable parameters for both the lmb and the opb is C_EXT_RESET_HIGH. You can look this up for both the lmb and opb modules. Then you will know whether a system is reset active high or low.

 

 

 

Technical Course Project Discussions

 

 

Xilinx

 

Question 1. I noticed on the lab that the version of Xilinx Platform Studio was an evaluation version. Would that be a problem for our project?
 

Answer: The installations of XPS are not evaluation. The message is referring to the ISE software. It is not because we have unlicensed software, it is an installation issue. But you can be assured of this would not be a problem for your project.
 

 

Question 2. Are the Xilinx tools capable of synthesizing HDL that includes both VHDL and Verilog?
 

Answer: ISE can definitely handle that. Cannot vouch for XPS, but would assume it can do too, since it uses synthesis tools which are included in ISE package.

 


 EDK Tools

 

Question 3. I was trying to use PS2. There's a whole bunch of IP cores in added directories and I can copy the IP cores I need into my project directory but the reference design suggests that I should be able to use BSB to create the PS2 connections. How do I add the repository directory easily to get access to all the ip cores at the start?
 

Answer:

·         Take the CD that came with your lab package and extract the library zip file (e.g. lib_rev_1_1.zip) into your network home directory.

·         Next build a new system using the Base System Builder Wizard. When asked, include a repository path. The path should be something like: H:\ensc460\lib_rev_1_1\lib

·         It's very important that you end with the "lib" directory in your path, or XPS won't be able to find the attached cores or board description file. You can then choose to include the PS2's IP interface and use that as a starting point if you like.

·        Don't forget to include the peripheral test to demonstrate how the peripheral works.

 

Question 4. How to set up the interrupt handler for GPIO?
 

Answer: It is possible to have 2 OPB devices working with interrupts. There is a note in the EDK documentation under the function XIntc_Connect(), that states "The handler provided as an argument will overwrite any handler that was previously connected" which is found at: C:/XilinxEDK/sw/XilinxProcessorIPLib/drivers/intc_v1_00_c/doc/html/api/ on the lab computers.

To get around this, you may need to create and initialize more than one interrupt controller instances with the same device ID. Connect each of your handlers and OPB device instances to the one of these controllers. If all your arguments are right you will be able to handle interrupts from different OPB sources. There may be an easier way.

For Gpio interrupts specifically there is an example in the EDK documentation that is very helpful.

 

Question 5. Does the LMB bus support custom IP's?
 

Answer: It seems like the LMB bus does not support custom IP's in 8.2 version.
 

Question 6. I'm using the expanded I/O header with an SPI interface core. I've configured the voltage outputs for LVTTL which is a 3.3V standard but I'm finding I only get 2.5V for a high. The VCCO for the expanded I/O pins does get 3.3V (at least according to the documentation). So what am I missing in order to get a 3.3V output?
 

Answer: The translation to 2.5V appears to be occurring as a result of the transistor bus switch. The FPGA does output 3.3V which then becomes 2.5V on the other side of the switch. According to the bus switch datasheet for a 5V signal there is about a 1V loss across the switch.

 

Question 7. I'm using the expanded I/O header with an SPI interface core. I've configured the voltage outputs for LVTTL which is a 3.3V standard but I'm finding I only get 2.5V for a high. The VCCO for the expanded I/O pins does get 3.3V (at least according to the documentation). So what am I missing in order to get a 3.3V output? Is there some global constraint overriding my constraints in the .ucf?


 Answer: The translation to 2.5V appears to be occurring as a result of the transistor bus switch. The FPGA does output 3.3V which then becomes 2.5V on the other side of the switch. According to the bus switch datasheet for a 5V signal there is about a 1V loss across the switch.
 

Question 8. I had the problem where XMD was closing right away when I started it up. However, I noticed that it popped up some error message before it closed. It would have been useful if the window stayed open for a few seconds for you to read the error message but unfortunately the console closes as soon as the error message pops up. What can I pause the XMD window to see the error?
 

Answer: Try to create a batch file with the following contents in your project root directory. The "pause" statement will mean that anything typed to the console will remain up until you hit a key. To start XMD, just double click on the batch file in windows or run it from a prompt.

  1. To make a batch file in windows, open up notepad or another text editor and save it in your project root dir as start_xmd.bat or something else.

  2. Paste the following contents:
    xmd -ipcport 1234 -opt ./etc/xmd_microblaze_0.opt -xmp system.xmp
    pause

  3. Run as described above. I hope this helps. If you get an error, try removing the "./" from the opt path. Also, if you have multiple processors, etc, make it point to the correct opt file that's in etc.

Another alternative is to pipe the output to a file or you can use “Print Screen”.
 

Question 9. My project required the use of dual Microblaze cores. The two CPUs share the same OPB Bus, and therefore I have two master in my OPB bus. When I have added my second Microblaze CPU, I am having problem with the push buttons interface on the OPB bus. I cannot detect any button changes. I can setup the button interrupt and read the GPIO register (GPIO_CH1) successfully. But the register was never updated when a button was pressed. I have triple-checked all hardware settings and the software initialization procedures. Everything was the same as the single Microblaze setup. On the other hand, the timer interrupts and sys flash Ace worked perfectly on the OPB bus. How I should approach this problem?

 Answer: There are the obvious checks:

  1. interrupts on the 2nd microblaze are disabled,

  2. no overlapping memory maps.

  3. the interrupt controller is enabled to daisy chain sufficient interrupts in the appropriate order

  4. the other interrupts don't somehow permanently disable the pushbuttons

  5. etc

The easiest thing to do is to add chipscope to your design and start to see what is actually happening. It would be very helpful to make sure that the gpio register value is changing at runtime (which it sounds like). Next, you want to know if an interrupt request is being sent to the interrupt controller. Finally, you want to see if the interrupt controller is sending an interrupt request to the appropriate microblaze.

Basically you are trying to trace the appropriate signals along the wires to find out where the problem appears at runtime. Chipscope will allow you to record the necessary to see what is happening each clock cycle.

This will allow you to localize the problem (the gpio, the interrupt controller, the microblaze).

 

 

Video

 

Question 10. May I use a DVD player to input video, or just read the pixels files from pc?
 

Answer: You do need the video decoder board. Once you got the video decoder board, you can sample the PAL/NTSC video data from VCR, DVD, VCD, TV, or Camera. There are S-Video and Composite ports on the video decoder board.

 

 

Audio Codec

 

Question 11-a. We tried to run the Built-In Demo, which uses the AC97 codec to play audio. We updated the project to EDK8.2, but when we tried to update the bitstream, we got the following error:

"ERROR:MDT - BRAM_WEN_B (opb_bram_if_cntlr_1_bram) -
H:\ensc460\Built_in_Demo_rev_1_1\system.mhs line 164 - 4 bit-width connector
does not match 1 bit-width port
Completion time: 0.00 seconds
ERROR:MDT - platgen failed with errors!"

We tried editing the MHS files but no luck... Any suggestions?
 

Answer:

Question 11-b. I tried doing what you suggested with the directory in the CD. I was able to add the Audio Codec but was UNABLE to generate libraries and BSPs. I have attached (Attachment) a copy of the output from the console window. Any suggestions?
 

Answer: There is a space in your path. The "Audio Component" folder is messing things up. Try again with no space.

 

 

CF Card

 

Question 12. I tried to insert a Lexar 256MB 4X CF card into the System ACE slot. However, instead of getting the normal flashing "Error" signal (D11), I got a solid red error signal. I tried to run a self-test on the system ACE controller, and it failed. Any suggestions?
 

Answer:

Question 13. How can I run my code from the CF?
 

Answer: To execute your code from the SRAM, you need to store your software application on CF and have a bootloader (in the BRAM) transfer the application to the SRAM. You can run it from external memory too. The procedure is not too much different than using the CF. You will still need the bootloader to be in the BRAM, but the application should executable from the SRAM.

 

Memory (DDR RAM)

 

Question 14-a. What is DDR bursting? What does it do?
 

Answer: OPB data burst read/write operation allows you to read/ write every OPB bus clock cycle and it's generally useful if you need to read from or write to DDR SDRAM at a very high rate. Refer to page 35 of the OPB DDR SDRAM controller document.
 

Question 14-b. I don't know why burst write doesn't work. Any suggestions?
 

Answer: You can perform burst write only when the "support OPB Burst Mode" is set to false.
 

Question 15. I appear to have run out of BRAM memory. How can I increase the size of memory above 64kb?
 Answer: If you want to access a large storage space in s/w, simply use DDR SDRAM. The easiest thing to do is:

This way you can reuse your code and you have 256MB of storage space.
 

Alternative solution:
 

Initially creating the system with BSB only allows a maximum of 64KB. But afterwards, it's possible to add more 64KB blocks. Specifically, you have to add more bram_block and lmb_bram_if_cntlr cores, you have to connect the controller to the BRAM and the controller to the LMB. Change the address of the controller so you have a single contiguous address space and it should be fine. The new ram is accessible via XMD (and your programs). The only complication with LMB is that since instruction and data are on separate busses, you have to group your instructions (.text) and data (everything else) separately. This can be done easily by right-click on project and choose generate linker script.

For some reason, XMDstub .data doesn't like to be relocated so the lowest 0000-FFFF address space should be left as is.

For example, suppose your program is 75KB with 10KB of variables and 50KB of stack. Then add 2 additional BRAM and controllers, connect 1 extra to iLMB and 1 extra to dLMB. Change the extra iLMB to be at addresses 10000 to 1FFFF and the extra dLMB to be wherever (ex. 30000 to 3FFFF).

Modify linker script to move everything but .text to the extra dLMB BRAM.

 

 

Coding

 

Question 16. Is there a Verilog equivalent to VHDL Generics? I've seen defines and ifdef's in verilog but is there another way of making customizable hardware modules?
 

Answer: Except for being able to parameterize models by overloading parameter constants, there is no equivalent to the high-level VHDL modeling statements in Verilog. Check out the following website for more information:
 

http://www.angelfire.com/in/rajesh52/verilogvhdl.html
 

This is a website from Douglas Smith, author of HDL book called "HDL Chip Design". It describes both Verilog and VHDL- comparing and contrasting them. I hope this answers your question. It should also be noted that there have been many updates to Verilog for Verilog 2000.

 

Question 17. I found out that my scanf/printf function calls are taking more than 80% of my code. Is there a more efficient/space saving version of scanf/printf that can be used on the microblaze?
 

Answer: Use xil_printf instead of printf and use getchar instead of scanf.

 

 

ModelSim

 

Question 18. In ModelSim, when we tried to open it from the start menu, it shows the splash screen for a few seconds but never opens the application. Same thing happens when trying to simulate a design in ISE if with your ISE simulator set to ModelSim. Is there any solution for it?
 

Answer: You have to use the ModelSim XE Starter version, not the full version. We don't have the license for the full version. Follow the ModelSim XE install instructions, take all the steps to setup the license including the request of license from the Xilinx website, place it in some folder then set the appropriate environment variable.

 

 

Reference Module

 

Question 19. I was trying to use/test reference modules provided by the manufacturer. I have tried opening both the "Slide Show" and "XUP_BSB_256MB_Single_Rank_VGA_......." projects and reached errors like: "The project was created with an older EDK version. XPS will update the......." "Encountered Unrecoverable Errors". What to do now?
 

Answer: Some of the designs have been updated for the latest tool releases. Go to *my* lab Information web page to download them. Also be sure to read the extra information posted there.
 

 

Miscellaneous

 

Question 20. How much it will cost to convert from a FPGA design to Structured ASIC based?
 

Answer:  

Question 21. As we were thinking about using the CF card /SATA HD to store data, we were suggested to use the external RAM instead since the CF card may cause some potential problems (The RAM should be good to store up to 1 min of video). And in addition, we can also borrow some other daughter boards other than the video input one. Does anyone have any suggestion?
 

Answer:  With the appropriate jumper cable, you could connect a bread board to the mother board if you need other simple IO besides the available buttons, switches, and LEDs (eg more of the same or sensors etc).
 

Question 22. I'm trying to have the same signal outputted to two different pins. First pin is created as an external port from the IP core (in this case the Q of a flipflop). The second pin I added as an external port and entered the names manually. The two pins are named differently (Signal1_pin - generated from Q, Signal2_pin - the external port I added) and they get the same signal (MySignal). The project fails on Updating the Bitstream at the NGDBulid with an error complaining that Signal1_pin couldn't be found. Any help?
 

Answer:  If you encounter this problem, delete the ports and recreate them by typing in the name for the ports. Set both ports to outputs and using shift/ctrl select the two ports and right click for the "Connect To" option. This allows you to select or enter the name of the net to connect. It'll end up with the same setup looking in the GUI but somehow this way works and other ways don't.

Particularly, seems that if one of the ports is created by taking an output and saying make external that seems to trigger the failure.